Home
last modified time | relevance | path

Searched refs:mmCRTCV_MASTER_UPDATE_MODE (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator_v.c66 mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
70 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h7457 #define mmCRTCV_MASTER_UPDATE_MODE 0x47be macro