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Searched refs:mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1269 #define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 0x5fd7 macro
H A Ddce_11_0_d.h1080 #define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 0x5fd7 macro
H A Ddce_11_2_d.h1158 #define mmDCCG_CPLL0_CPLL_MACRO_CNTL_RESERVED7 0x5fd7 macro