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Searched refs:mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1368 #define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 0x1766 macro
H A Ddce_11_0_d.h1179 #define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 0x1766 macro
H A Ddce_11_2_d.h1257 #define mmDCCG_PLL2_PLL_MACRO_CNTL_RESERVED18 0x1766 macro