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Searched refs:mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1688 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 0x4920 macro
H A Ddce_11_0_d.h1518 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 0x4920 macro
H A Ddce_11_2_d.h1629 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 0x9aa0 macro
H A Ddce_12_0_offset.h13578 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h12207 #define mmDCIO_UNIPHY3_UNIPHY_MACRO_CNTL_RESERVED0 … macro