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Searched refs:mmDF_CS_UMC_AON0_DramBaseAddress0 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/df/
H A Ddf_3_6_offset.h30 #define mmDF_CS_UMC_AON0_DramBaseAddress0 0x0044 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddf_v3_6.c55 tmp = RREG32_SOC15(DF, 0, mmDF_CS_UMC_AON0_DramBaseAddress0); in df_v3_6_get_fb_channel_number()