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Searched refs:mmDMCU_PERFMON_INTERRUPT_STATUS2 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3740 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 0x1751 macro
H A Ddce_10_0_d.h4365 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 0x1645 macro
H A Ddce_11_0_d.h4320 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 0x1645 macro
H A Ddce_11_2_d.h5552 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 0x1645 macro
H A Ddce_12_0_offset.h1358 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1024 #define mmDMCU_PERFMON_INTERRUPT_STATUS2 macro