Home
last modified time | relevance | path

Searched refs:mmDMCU_PERFMON_INTERRUPT_STATUS3 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3741 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 0x1752 macro
H A Ddce_10_0_d.h4366 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 0x1646 macro
H A Ddce_11_0_d.h4321 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 0x1646 macro
H A Ddce_11_2_d.h5553 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 0x1646 macro
H A Ddce_12_0_offset.h1360 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1026 #define mmDMCU_PERFMON_INTERRUPT_STATUS3 … macro