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Searched refs:mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h4373 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
H A Ddce_11_0_d.h4328 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
H A Ddce_11_2_d.h5560 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 0x1643 macro
H A Ddce_12_0_offset.h1354 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h1040 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_EN_MASK5 … macro