Searched refs:mmGCEA_DRAM_WR_CAM_CNTL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ | ||
H A D | gc_9_1_offset.h | 1737 #define mmGCEA_DRAM_WR_CAM_CNTL_BASE_IDX … macro |
H A D | gc_9_2_1_offset.h | 1679 #define mmGCEA_DRAM_WR_CAM_CNTL_BASE_IDX … macro |