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Searched refs:mmGDS_PS0_CTXSW_CNT0 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_d.h2519 #define mmGDS_PS0_CTXSW_CNT0 0x3357 macro
H A Dgfx_8_1_d.h2498 #define mmGDS_PS0_CTXSW_CNT0 0x3357 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3145 #define mmGDS_PS0_CTXSW_CNT0 … macro
H A Dgc_9_1_offset.h3432 #define mmGDS_PS0_CTXSW_CNT0 … macro
H A Dgc_9_2_1_offset.h3382 #define mmGDS_PS0_CTXSW_CNT0 … macro