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Searched refs:mmLB_VBLANK_STATUS (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c3170 tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]); in dce_v10_0_crtc_vblank_int_ack()
3172 WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp); in dce_v10_0_crtc_vblank_int_ack()
H A Ddce_v11_0.c3296 tmp = RREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc]); in dce_v11_0_crtc_vblank_int_ack()
3298 WREG32(mmLB_VBLANK_STATUS + crtc_offsets[crtc], tmp); in dce_v11_0_crtc_vblank_int_ack()
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h4614 #define mmLB_VBLANK_STATUS 0x1acb macro
H A Ddce_10_0_d.h5295 #define mmLB_VBLANK_STATUS 0x1acb macro
H A Ddce_11_0_d.h5353 #define mmLB_VBLANK_STATUS 0x1acb macro
H A Ddce_11_2_d.h6610 #define mmLB_VBLANK_STATUS 0x1acb macro