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Searched refs:mmMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_default.h983 #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x00000000 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_default.h844 #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x00000000 macro