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Searched refs:mmMC_VM_MX_L1_PERFCOUNTER0_CFG_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_0_offset.h1217 #define mmMC_VM_MX_L1_PERFCOUNTER0_CFG_BASE_IDX … macro
H A Dmmhub_9_1_offset.h1217 #define mmMC_VM_MX_L1_PERFCOUNTER0_CFG_BASE_IDX … macro
H A Dmmhub_9_3_0_offset.h1233 #define mmMC_VM_MX_L1_PERFCOUNTER0_CFG_BASE_IDX … macro