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Searched refs:mmMP0_MISC_CGTT_CTRL0 (Results 1 – 1 of 1) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsoc15.c63 #define mmMP0_MISC_CGTT_CTRL0 0x0… macro
847 def = data = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0)); in soc15_update_drm_clock_gating()
869 WREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0), data); in soc15_update_drm_clock_gating()
968 data = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0)); in soc15_common_get_clockgating_state()