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Searched refs:mmPA_CL_UCP_2_W (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h820 #define mmPA_CL_UCP_2_W 0xA17A macro
H A Dgfx_7_0_d.h935 #define mmPA_CL_UCP_2_W 0xa17a macro
H A Dgfx_7_2_d.h948 #define mmPA_CL_UCP_2_W 0xa17a macro
H A Dgfx_8_0_d.h1030 #define mmPA_CL_UCP_2_W 0xa17a macro
H A Dgfx_8_1_d.h1030 #define mmPA_CL_UCP_2_W 0xa17a macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3773 #define mmPA_CL_UCP_2_W … macro
H A Dgc_9_1_offset.h4060 #define mmPA_CL_UCP_2_W … macro
H A Dgc_9_2_1_offset.h4010 #define mmPA_CL_UCP_2_W … macro