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Searched refs:mmPCIE_LANE_5_EQUALIZATION_CNTL (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/bif/
H A Dbif_4_1_d.h280 #define mmPCIE_LANE_5_EQUALIZATION_CNTL 0xa1 macro
H A Dbif_5_0_d.h335 #define mmPCIE_LANE_5_EQUALIZATION_CNTL 0xa1 macro
H A Dbif_5_1_d.h306 #define mmPCIE_LANE_5_EQUALIZATION_CNTL 0xa1 macro