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Searched refs:mmRESPONSE_INTERRUPT_COUNT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h5319 #define mmRESPONSE_INTERRUPT_COUNT 0x16 macro
H A Ddce_10_0_d.h6553 #define mmRESPONSE_INTERRUPT_COUNT 0x16 macro
H A Ddce_11_0_d.h6715 #define mmRESPONSE_INTERRUPT_COUNT 0x16 macro
H A Ddce_11_2_d.h8060 #define mmRESPONSE_INTERRUPT_COUNT 0x16 macro
H A Ddce_12_0_offset.h16756 #define mmRESPONSE_INTERRUPT_COUNT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h152 #define mmRESPONSE_INTERRUPT_COUNT … macro