Searched refs:mmRLC_SPM_UTCL1_CNTL (Results 1 – 4 of 4) sorted by relevance
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | gfx_v9_0.c | 119 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080), 157 SOC15_REG_GOLDEN_VALUE(GC, 0, mmRLC_SPM_UTCL1_CNTL, 0x08000000, 0x08000080),
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/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
H A D | gc_9_0_offset.h | 6163 #define mmRLC_SPM_UTCL1_CNTL … macro
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H A D | gc_9_1_offset.h | 6442 #define mmRLC_SPM_UTCL1_CNTL … macro
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H A D | gc_9_2_1_offset.h | 6418 #define mmRLC_SPM_UTCL1_CNTL … macro
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