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Searched refs:mmSDMA0_GFX_IB_RPTR (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h226 #define mmSDMA0_GFX_IB_RPTR … macro
H A Dsdma0_4_0_offset.h230 #define mmSDMA0_GFX_IB_RPTR 0x008b macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h198 #define mmSDMA0_GFX_IB_RPTR 0x348b macro
H A Doss_3_0_1_d.h225 #define mmSDMA0_GFX_IB_RPTR 0x348b macro
H A Doss_2_0_d.h257 #define mmSDMA0_GFX_IB_RPTR 0x348b macro
H A Doss_3_0_d.h350 #define mmSDMA0_GFX_IB_RPTR 0x348b macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v2_4.c445 WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0); in sdma_v2_4_gfx_resume()
H A Dsdma_v3_0.c685 WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0); in sdma_v3_0_gfx_resume()