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Searched refs:mmSDMA0_GFX_MIDCMD_DATA1 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h272 #define mmSDMA0_GFX_MIDCMD_DATA1 … macro
H A Dsdma0_4_0_offset.h276 #define mmSDMA0_GFX_MIDCMD_DATA1 0x00c1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h244 #define mmSDMA0_GFX_MIDCMD_DATA1 0x34c2 macro
H A Doss_3_0_d.h369 #define mmSDMA0_GFX_MIDCMD_DATA1 0x34c2 macro