Home
last modified time | relevance | path

Searched refs:mmSDMA0_GFX_RB_AQL_CNTL (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h266 #define mmSDMA0_GFX_RB_AQL_CNTL macro
H A Dsdma0_4_0_offset.h270 #define mmSDMA0_GFX_RB_AQL_CNTL 0x00b4 macro