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Searched refs:mmSDMA0_GFX_RB_RPTR_HI (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h212 #define mmSDMA0_GFX_RB_RPTR_HI … macro
H A Dsdma0_4_0_offset.h216 #define mmSDMA0_GFX_RB_RPTR_HI 0x0084 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v4_0.c648 WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_RPTR_HI), 0); in sdma_v4_0_gfx_resume()