Home
last modified time | relevance | path

Searched refs:mmSDMA0_RLC0_MINOR_PTR_UPDATE (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v9.c572 WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 1); in kgd_hqd_sdma_load()
584 WREG32(sdma_base_addr + mmSDMA0_RLC0_MINOR_PTR_UPDATE, 0); in kgd_hqd_sdma_load()
620 reg <= mmSDMA0_RLC0_MINOR_PTR_UPDATE; reg++) in kgd_hqd_sdma_dump()
/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h352 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE … macro
H A Dsdma0_4_0_offset.h440 #define mmSDMA0_RLC0_MINOR_PTR_UPDATE 0x0175 macro