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Searched refs:mmSDMA0_RLC0_RB_BASE (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h292 #define mmSDMA0_RLC0_RB_BASE … macro
H A Dsdma0_4_0_offset.h380 #define mmSDMA0_RLC0_RB_BASE 0x0141 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h215 #define mmSDMA0_RLC0_RB_BASE 0x3501 macro
H A Doss_3_0_1_d.h254 #define mmSDMA0_RLC0_RB_BASE 0x3501 macro
H A Doss_2_0_d.h269 #define mmSDMA0_RLC0_RB_BASE 0x3501 macro
H A Doss_3_0_d.h376 #define mmSDMA0_RLC0_RB_BASE 0x3501 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v8.c471 WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_hqd_sdma_load()
H A Damdgpu_amdkfd_gfx_v9.c586 WREG32(sdma_base_addr + mmSDMA0_RLC0_RB_BASE, m->sdmax_rlcx_rb_base); in kgd_hqd_sdma_load()