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Searched refs:mmSDMA0_RLC1_CSA_ADDR_HI (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h422 #define mmSDMA0_RLC1_CSA_ADDR_HI … macro
H A Dsdma0_4_0_offset.h510 #define mmSDMA0_RLC1_CSA_ADDR_HI 0x01cd macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h266 #define mmSDMA0_RLC1_CSA_ADDR_HI 0x35ad macro
H A Doss_3_0_1_d.h315 #define mmSDMA0_RLC1_CSA_ADDR_HI 0x35ad macro
H A Doss_3_0_d.h434 #define mmSDMA0_RLC1_CSA_ADDR_HI 0x35ad macro