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Searched refs:mmSDMA0_RLC1_MIDCMD_DATA3 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h444 #define mmSDMA0_RLC1_MIDCMD_DATA3 … macro
H A Dsdma0_4_0_offset.h532 #define mmSDMA0_RLC1_MIDCMD_DATA3 0x01e3 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h322 #define mmSDMA0_RLC1_MIDCMD_DATA3 0x35c4 macro
H A Doss_3_0_d.h441 #define mmSDMA0_RLC1_MIDCMD_DATA3 0x35c4 macro