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Searched refs:mmSDMA0_RLC1_MINOR_PTR_UPDATE (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h436 #define mmSDMA0_RLC1_MINOR_PTR_UPDATE … macro
H A Dsdma0_4_0_offset.h524 #define mmSDMA0_RLC1_MINOR_PTR_UPDATE 0x01d5 macro