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Searched refs:mmSDMA0_UCODE_DATA (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h30 #define mmSDMA0_UCODE_DATA … macro
H A Dsdma0_4_0_offset.h30 #define mmSDMA0_UCODE_DATA 0x0001 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h158 #define mmSDMA0_UCODE_DATA 0x3401 macro
H A Doss_3_0_1_d.h155 #define mmSDMA0_UCODE_DATA 0x3401 macro
H A Doss_2_0_d.h220 #define mmSDMA0_UCODE_DATA 0x3401 macro
H A Doss_3_0_d.h292 #define mmSDMA0_UCODE_DATA 0x3401 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dpsp_v10_0.c373 *sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA); in psp_v10_0_sram_map()
H A Dpsp_v3_1.c506 *sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA); in psp_v3_1_sram_map()
H A Dsdma_v2_4.c536 WREG32(mmSDMA0_UCODE_DATA + sdma_offsets[i], le32_to_cpup(fw_data++)); in sdma_v2_4_load_microcode()
H A Dsdma_v3_0.c809 WREG32(mmSDMA0_UCODE_DATA + sdma_offsets[i], le32_to_cpup(fw_data++)); in sdma_v3_0_load_microcode()
H A Dsdma_v4_0.c863 WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_UCODE_DATA), le32_to_cpup(fw_data++)); in sdma_v4_0_load_microcode()