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Searched refs:mmSDMA1_RLC0_MIDCMD_DATA7 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h448 #define mmSDMA1_RLC0_MIDCMD_DATA7 0x0187 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_d.h459 #define mmSDMA1_RLC0_MIDCMD_DATA7 0x3748 macro