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Searched refs:mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h278 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL 0x3609 macro
H A Doss_3_0_1_d.h337 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL 0x3609 macro
H A Doss_2_0_d.h323 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL 0x3609 macro
H A Doss_3_0_d.h453 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL 0x3609 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_offset.h80 #define mmSDMA1_SEM_WAIT_FAIL_TIMER_CNTL 0x0021 macro