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Searched refs:mmSPI_PS_INPUT_CNTL_26 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1239 #define mmSPI_PS_INPUT_CNTL_26 0xA1AB macro
H A Dgfx_7_0_d.h1387 #define mmSPI_PS_INPUT_CNTL_26 0xa1ab macro
H A Dgfx_7_2_d.h1404 #define mmSPI_PS_INPUT_CNTL_26 0xa1ab macro
H A Dgfx_8_0_d.h1583 #define mmSPI_PS_INPUT_CNTL_26 0xa1ab macro
H A Dgfx_8_1_d.h1551 #define mmSPI_PS_INPUT_CNTL_26 0xa1ab macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3851 #define mmSPI_PS_INPUT_CNTL_26 … macro
H A Dgc_9_1_offset.h4138 #define mmSPI_PS_INPUT_CNTL_26 … macro
H A Dgc_9_2_1_offset.h4090 #define mmSPI_PS_INPUT_CNTL_26 … macro