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Searched refs:mmSPI_RESOURCE_RESERVE_CU_1 (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dmxgpu_vi.c131 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
274 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
H A Dgfx_v8_0.c220 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
330 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
361 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
394 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
406 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
494 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
590 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
695 mmSPI_RESOURCE_RESERVE_CU_1, 0xffffffff, 0x00000800,
H A Dgfx_v9_0.c93 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_1, 0x0007ffff, 0x00000800),
192 SOC15_REG_GOLDEN_VALUE(GC, 0, mmSPI_RESOURCE_RESERVE_CU_1, 0x0007ffff, 0x00000800),
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1432 #define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd macro
H A Dgfx_7_2_d.h1449 #define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd macro
H A Dgfx_8_0_d.h1628 #define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd macro
H A Dgfx_8_1_d.h1596 #define mmSPI_RESOURCE_RESERVE_CU_1 0x31dd macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2673 #define mmSPI_RESOURCE_RESERVE_CU_1 … macro
H A Dgc_9_1_offset.h2958 #define mmSPI_RESOURCE_RESERVE_CU_1 … macro
H A Dgc_9_2_1_offset.h2914 #define mmSPI_RESOURCE_RESERVE_CU_1 … macro