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Searched refs:mmSPI_RESOURCE_RESERVE_CU_5 (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h1436 #define mmSPI_RESOURCE_RESERVE_CU_5 0x31e1 macro
H A Dgfx_7_2_d.h1453 #define mmSPI_RESOURCE_RESERVE_CU_5 0x31e1 macro
H A Dgfx_8_0_d.h1632 #define mmSPI_RESOURCE_RESERVE_CU_5 0x31e1 macro
H A Dgfx_8_1_d.h1600 #define mmSPI_RESOURCE_RESERVE_CU_5 0x31e1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2681 #define mmSPI_RESOURCE_RESERVE_CU_5 … macro
H A Dgc_9_1_offset.h2966 #define mmSPI_RESOURCE_RESERVE_CU_5 … macro
H A Dgc_9_2_1_offset.h2922 #define mmSPI_RESOURCE_RESERVE_CU_5 … macro