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Searched refs:mmUNIPHYA_CHANNEL_XBAR_CNTL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1537 #define mmUNIPHYA_CHANNEL_XBAR_CNTL 0x4806 macro
H A Ddce_11_0_d.h1364 #define mmUNIPHYA_CHANNEL_XBAR_CNTL 0x4806 macro
H A Ddce_11_2_d.h1444 #define mmUNIPHYA_CHANNEL_XBAR_CNTL 0x4806 macro
H A Ddce_12_0_offset.h1816 #define mmUNIPHYA_CHANNEL_XBAR_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h10353 #define mmUNIPHYA_CHANNEL_XBAR_CNTL … macro