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Searched refs:mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h232 #define mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvcn_v1_0.c1364 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0)); in vcn_v1_0_jpeg_ring_emit_ib()