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Searched refs:mmVCE_RB_ARB_CTRL (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h37 #define mmVCE_RB_ARB_CTRL 0x809F macro
H A Dvce_2_0_d.h46 #define mmVCE_RB_ARB_CTRL 0x809f macro
H A Dvce_3_0_d.h46 #define mmVCE_RB_ARB_CTRL 0x809f macro
H A Dvce_4_0_offset.h90 #define mmVCE_RB_ARB_CTRL macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvce_v4_0.c791 tmp = data = RREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_ARB_CTRL));
798 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_ARB_CTRL), data);