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Searched refs:mmVCE_RB_SIZE2 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h45 #define mmVCE_RB_SIZE2 0x805D macro
H A Dvce_2_0_d.h38 #define mmVCE_RB_SIZE2 0x805d macro
H A Dvce_3_0_d.h38 #define mmVCE_RB_SIZE2 0x805d macro
H A Dvce_4_0_offset.h74 #define mmVCE_RB_SIZE2 … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvce_v3_0.c293 WREG32(mmVCE_RB_SIZE2, ring->ring_size / 4); in vce_v3_0_start()
H A Dvce_v4_0.c349 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_RB_SIZE2), ring->ring_size / 4); in vce_v4_0_start()