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Searched refs:mmXDMA_MSTR_CACHE_BASE_ADDR (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_d.h482 #define mmXDMA_MSTR_CACHE_BASE_ADDR 0x408 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h7281 #define mmXDMA_MSTR_CACHE_BASE_ADDR 0x408 macro
H A Ddce_11_0_d.h7580 #define mmXDMA_MSTR_CACHE_BASE_ADDR 0x408 macro
H A Ddce_11_2_d.h8974 #define mmXDMA_MSTR_CACHE_BASE_ADDR 0x408 macro