Searched refs:new_active_crtc_count (Results 1 – 13 of 13) sorted by relevance
908 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()1097 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()1110 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()1116 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()1160 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()1824 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()1831 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1748 if (rdev->pm.dpm.new_active_crtc_count > 0) in cypress_program_display_gap()1753 if (rdev->pm.dpm.new_active_crtc_count > 1) in cypress_program_display_gap()1763 if ((rdev->pm.dpm.new_active_crtc_count > 0) && in cypress_program_display_gap()1780 cypress_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0); in cypress_program_display_gap()
3015 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in si_apply_state_adjust_rules()3686 if (rdev->pm.dpm.new_active_crtc_count > 0) in si_program_display_gap()3691 if (rdev->pm.dpm.new_active_crtc_count > 1) in si_program_display_gap()3701 if ((rdev->pm.dpm.new_active_crtc_count > 0) && in si_program_display_gap()3722 si_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0); in si_program_display_gap()5003 (rdev->pm.dpm.new_active_crtc_count <= 2)) { in si_convert_power_level_to_smc()5320 if (rdev->pm.dpm.new_active_crtc_count == 0) in si_upload_smc_data()
1552 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; in trinity_apply_state_adjust_rules()1642 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; in trinity_add_dccac_value()
847 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in ci_apply_state_adjust_rules()2029 if (rdev->pm.dpm.new_active_crtc_count > 0) in ci_program_display_gap()2049 ci_notify_smc_display_change(rdev, (rdev->pm.dpm.new_active_crtc_count == 1)); in ci_program_display_gap()2967 (rdev->pm.dpm.new_active_crtc_count <= 2)) in ci_populate_single_memory_level()3924 rdev->pm.dpm.new_active_crtc_count) in ci_find_dpm_states_clocks_in_dpm_table()
2240 pi->video_start || (rdev->pm.dpm.new_active_crtc_count >= 3) || in kv_apply_state_adjust_rules()2299 (rdev->pm.dpm.new_active_crtc_count >= 3) || pi->video_start); in kv_calculate_nbps_level_settings()
2101 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in btc_apply_state_adjust_rules()
1570 int new_active_crtc_count; member
795 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in ni_apply_state_adjust_rules()
385 int new_active_crtc_count; member
1568 bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ? in amdgpu_dpm_pick_power_state()1749 adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count; in amdgpu_dpm_change_power_state_locked()2000 adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count; in amdgpu_pm_compute_clocks()
126 adev->pm.dpm.new_active_crtc_count = 0; in amdgpu_dpm_get_active_displays()133 adev->pm.dpm.new_active_crtc_count++; in amdgpu_dpm_get_active_displays()
3474 if ((adev->pm.dpm.new_active_crtc_count > 1) || in si_apply_state_adjust_rules()4152 if (adev->pm.dpm.new_active_crtc_count > 0) in si_program_display_gap()4157 if (adev->pm.dpm.new_active_crtc_count > 1) in si_program_display_gap()4167 if ((adev->pm.dpm.new_active_crtc_count > 0) && in si_program_display_gap()4188 si_notify_smc_display_change(adev, adev->pm.dpm.new_active_crtc_count > 0); in si_program_display_gap()5466 (adev->pm.dpm.new_active_crtc_count <= 2)) { in si_convert_power_level_to_smc()5781 if (adev->pm.dpm.new_active_crtc_count == 0) in si_upload_smc_data()