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Searched refs:phyclkv_max0p9 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/calcs/
H A Ddcn_calcs.c84 .phyclkv_max0p9 = 900, /*MHz*/
744 v->phyclkv_max0p9 = dc->dcn_soc->phyclkv_max0p9; in dcn_validate_bandwidth()
820 v->phyclk_per_state[5] = v->phyclkv_max0p9; in dcn_validate_bandwidth()
821 v->phyclk_per_state[4] = v->phyclkv_max0p9; in dcn_validate_bandwidth()
822 v->phyclk_per_state[3] = v->phyclkv_max0p9; in dcn_validate_bandwidth()
1223 if (clocks_in_khz > dc->dcn_soc->phyclkv_max0p9*1000) { in dcn_find_normalized_clock_vdd_Level()
1531 dc->dcn_soc->phyclkv_max0p9 * 1000, in dcn_bw_sync_calcs_and_dml()
/dragonfly/sys/dev/drm/amd/display/dc/inc/
H A Ddcn_calcs.h164 float phyclkv_max0p9; member
569 float phyclkv_max0p9; /*MHz*/ member