Searched refs:pipe_idx (Results 1 – 12 of 12) sorted by relevance
1304 pipe_ctx[pipe_ctx->pipe_idx]; in dce110_enable_stream_timing()1360 pipe_ctx[pipe_ctx->pipe_idx]; in apply_single_controller_ctx_to_hw()1819 uint32_t *pipe_idx) in should_enable_fbc() argument1839 *pipe_idx = i; in should_enable_fbc()1872 uint32_t pipe_idx = 0; in enable_fbc() local1874 if (should_enable_fbc(dc, context, &pipe_idx)) { in enable_fbc()2452 cfg->pipe_idx = pipe_ctx->stream_res.tg->inst; in dce110_fill_display_configs()2570 pp_display_cfg->disp_configs[0].pipe_idx; in pplib_apply_display_requirements()2655 pipe_ctx->pipe_idx != underlay_idx) { in dce110_program_front_end_for_pipe()2695 pipe_ctx->pipe_idx, in dce110_program_front_end_for_pipe()[all …]
777 if (pipe_ctx->pipe_idx != underlay_idx) in is_surface_pixel_format_supported()986 pipe_ctx->pipe_idx = underlay_idx; in dce110_acquire_underlay()
1162 secondary_pipe->pipe_idx = i; in find_idle_secondary_pipe()1276 pipe_ctx->pipe_idx = i; in acquire_first_split_pipe()1326 if (pipe_idx >= 0) in dc_add_plane_to_context()1327 free_pipe = &context->res_ctx.pipe_ctx[pipe_idx]; in dc_add_plane_to_context()1649 pipe_ctx->pipe_idx = i; in acquire_first_free_pipe()1913 int pipe_idx = -1; in resource_map_pool_resources() local1929 pipe_idx = acquire_first_free_pipe(&context->res_ctx, pool, stream); in resource_map_pool_resources()1932 if (pipe_idx < 0) in resource_map_pool_resources()1933 pipe_idx = acquire_first_split_pipe(&context->res_ctx, pool, stream); in resource_map_pool_resources()1936 if (pipe_idx < 0 || context->res_ctx.pipe_ctx[pipe_idx].stream_res.tg == NULL) in resource_map_pool_resources()[all …]
326 || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
2298 pipe_ctx->pipe_idx); in allocate_mst_payload()2386 pipe_ctx->pipe_idx); in deallocate_mst_payload()
1032 context->res_ctx.pipe_ctx[i].pipe_idx = i; in dc_post_update_surfaces_to_stream()
502 int pipe_idx = secondary_pipe->pipe_idx; in split_stream_across_pipes() local509 secondary_pipe->pipe_idx = pipe_idx; in split_stream_across_pipes()510 secondary_pipe->plane_res.mi = pool->mis[secondary_pipe->pipe_idx]; in split_stream_across_pipes()511 secondary_pipe->plane_res.hubp = pool->hubps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()512 secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()513 secondary_pipe->plane_res.xfm = pool->transforms[secondary_pipe->pipe_idx]; in split_stream_across_pipes()514 secondary_pipe->plane_res.dpp = pool->dpps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()515 secondary_pipe->plane_res.mpcc_inst = pool->dpps[secondary_pipe->pipe_idx]->inst; in split_stream_across_pipes()
118 uint8_t pipe_idx; member
1042 idle_pipe->plane_res.hubp = pool->hubps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()1043 idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()1044 idle_pipe->plane_res.dpp = pool->dpps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()1045 idle_pipe->plane_res.mpcc_inst = pool->dpps[idle_pipe->pipe_idx]->inst; in dcn10_acquire_idle_pipe_for_layer()
754 pipe_ctx->pipe_idx, pipe_ctx->stream_res.tg->inst); in reset_back_end_for_pipe()903 "Power gated front end %d\n", pipe_ctx->pipe_idx); in plane_atomic_power_down()952 pipe_ctx->pipe_idx); in dcn10_disable_plane()1029 pipe_ctx->pipe_idx = i; in dcn10_init_hw()2353 old_pipe_ctx->pipe_idx); in dcn10_apply_ctx_for_surface()
220 uint8_t pipe_idx; member
101 adev->pm.pm_display_cfg.displays[i].controller_id = dc_cfg->pipe_idx + 1; in dm_pp_apply_display_requirements()