Searched refs:pl1 (Results 1 – 2 of 2) sorted by relevance
4179 static inline bool smu7_are_power_levels_equal(const struct smu7_performance_level *pl1, in smu7_are_power_levels_equal() argument4182 return ((pl1->memory_clock == pl2->memory_clock) && in smu7_are_power_levels_equal()4183 (pl1->engine_clock == pl2->engine_clock) && in smu7_are_power_levels_equal()4184 (pl1->pcie_gen == pl2->pcie_gen) && in smu7_are_power_levels_equal()4185 (pl1->pcie_lane == pl2->pcie_lane)); in smu7_are_power_levels_equal()
4383 const struct vega10_performance_level *pl1, in vega10_are_power_levels_equal() argument4386 return ((pl1->soc_clock == pl2->soc_clock) && in vega10_are_power_levels_equal()4387 (pl1->gfx_clock == pl2->gfx_clock) && in vega10_are_power_levels_equal()4388 (pl1->mem_clock == pl2->mem_clock)); in vega10_are_power_levels_equal()