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Searched refs:pps_idx (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Di915_reg.h4419 #define _MMIO_PPS(pps_idx, reg) _MMIO(dev_priv->pps_mmio_base - \ argument
4421 (pps_idx) * 0x100)
4424 #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS) argument
4452 #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL) argument
4464 #define PP_ON_DELAYS(pps_idx) _MMIO_PPS(pps_idx, _PP_ON_DELAYS) argument
4478 #define PP_OFF_DELAYS(pps_idx) _MMIO_PPS(pps_idx, _PP_OFF_DELAYS) argument
4485 #define PP_DIVISOR(pps_idx) _MMIO_PPS(pps_idx, _PP_DIVISOR) argument
H A Dintel_dp.c790 int pps_idx = 0; in intel_pps_get_registers() local
795 pps_idx = bxt_power_sequencer_idx(intel_dp); in intel_pps_get_registers()
797 pps_idx = vlv_power_sequencer_pipe(intel_dp); in intel_pps_get_registers()
799 regs->pp_ctrl = PP_CONTROL(pps_idx); in intel_pps_get_registers()
800 regs->pp_stat = PP_STATUS(pps_idx); in intel_pps_get_registers()
801 regs->pp_on = PP_ON_DELAYS(pps_idx); in intel_pps_get_registers()
802 regs->pp_off = PP_OFF_DELAYS(pps_idx); in intel_pps_get_registers()
804 regs->pp_div = PP_DIVISOR(pps_idx); in intel_pps_get_registers()
H A Dintel_display.c13570 int pps_idx; in intel_pps_unlock_regs_wa() local
13583 for (pps_idx = 0; pps_idx < pps_num; pps_idx++) { in intel_pps_unlock_regs_wa()
13584 u32 val = I915_READ(PP_CONTROL(pps_idx)); in intel_pps_unlock_regs_wa()
13587 I915_WRITE(PP_CONTROL(pps_idx), val); in intel_pps_unlock_regs_wa()