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Searched refs:s32 (Results 1 – 25 of 83) sorted by relevance

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/dragonfly/sys/dev/netif/ix/
H A Dixgbe_api.h52 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
53 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
54 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
55 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
60 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
68 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
125 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
126 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
127 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
133 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
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H A Dixgbe_common.h55 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
56 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
57 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
58 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
109 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
110 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
115 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
118 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
120 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
144 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
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H A Dixgbe_x550.h40 s32 ixgbe_dmac_config_X550(struct ixgbe_hw *hw);
41 s32 ixgbe_dmac_config_tcs_X550(struct ixgbe_hw *hw);
42 s32 ixgbe_dmac_update_tcs_X550(struct ixgbe_hw *hw);
44 s32 ixgbe_get_bus_info_X550em(struct ixgbe_hw *hw);
50 s32 ixgbe_update_flash_X550(struct ixgbe_hw *hw);
71 s32 ixgbe_get_phy_token(struct ixgbe_hw *);
72 s32 ixgbe_put_phy_token(struct ixgbe_hw *);
86 s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw);
88 s32 ixgbe_setup_kr_x550em(struct ixgbe_hw *hw);
89 s32 ixgbe_init_ext_t_x550em(struct ixgbe_hw *hw);
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H A Dixgbe_phy.h159 s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
162 s32 ixgbe_get_phy_id(struct ixgbe_hw *hw);
163 s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
164 s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
173 s32 ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
180 s32 ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
183 s32 ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
186 s32 ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
192 s32 ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
194 s32 ixgbe_identify_module_generic(struct ixgbe_hw *hw);
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H A Dixgbe_api.c87 s32 status; in ixgbe_init_shared_code()
131 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) in ixgbe_set_mac_type()
133 s32 ret_val = IXGBE_SUCCESS; in ixgbe_set_mac_type()
231 s32 ixgbe_init_hw(struct ixgbe_hw *hw) in ixgbe_init_hw()
244 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) in ixgbe_reset_hw()
260 s32 ixgbe_start_hw(struct ixgbe_hw *hw) in ixgbe_start_hw()
474 s32 status = IXGBE_SUCCESS; in ixgbe_identify_phy()
488 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) in ixgbe_reset_phy()
490 s32 status = IXGBE_SUCCESS; in ixgbe_reset_phy()
511 s32 status = IXGBE_SUCCESS; in ixgbe_get_phy_firmware_version()
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H A Dixgbe_x540.h40 s32 ixgbe_get_link_capabilities_X540(struct ixgbe_hw *hw,
45 s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw);
46 s32 ixgbe_start_hw_X540(struct ixgbe_hw *hw);
49 s32 ixgbe_init_eeprom_params_X540(struct ixgbe_hw *hw);
50 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
56 s32 ixgbe_update_eeprom_checksum_X540(struct ixgbe_hw *hw);
58 s32 ixgbe_calc_eeprom_checksum_X540(struct ixgbe_hw *hw);
59 s32 ixgbe_update_flash_X540(struct ixgbe_hw *hw);
61 s32 ixgbe_acquire_swfw_sync_X540(struct ixgbe_hw *hw, u32 mask);
65 s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index);
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H A Dixgbe_mbx.c50 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_read_mbx()
76 s32 ret_val = IXGBE_SUCCESS; in ixgbe_write_mbx()
100 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_msg()
120 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_ack()
140 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_check_for_rst()
227 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_read_posted_mbx()
257 s32 ret_val = IXGBE_ERR_MBX; in ixgbe_write_posted_mbx()
428 s32 ret_val; in ixgbe_write_mbx_vf()
527 static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) in ixgbe_check_for_bit_pf()
668 s32 ret_val; in ixgbe_write_mbx_pf()
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H A Dixgbe_82599.h38 s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw,
46 s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
49 s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
53 s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw);
55 s32 ixgbe_reset_hw_82599(struct ixgbe_hw *hw);
56 s32 ixgbe_read_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 *val);
57 s32 ixgbe_write_analog_reg8_82599(struct ixgbe_hw *hw, u32 reg, u8 val);
58 s32 ixgbe_start_hw_82599(struct ixgbe_hw *hw);
59 s32 ixgbe_identify_phy_82599(struct ixgbe_hw *hw);
60 s32 ixgbe_init_phy_ops_82599(struct ixgbe_hw *hw);
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H A Dixgbe_dcb.h139 s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *);
142 s32 ixgbe_dcb_calculate_tc_credits(u8 *, u16 *, u16 *, int);
143 s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *,
147 s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *, u8, u8 *);
148 s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *, struct ixgbe_dcb_config *);
151 s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *);
152 s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *, struct ixgbe_hw_stats *, u8);
156 s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *,
158 s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *,
160 s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *,
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/dragonfly/sys/dev/netif/ig_hal/
H A De1000_phy.h49 s32 e1000_check_polarity_m88(struct e1000_hw *hw);
50 s32 e1000_check_polarity_igp(struct e1000_hw *hw);
51 s32 e1000_check_polarity_ife(struct e1000_hw *hw);
53 s32 e1000_phy_setup_autoneg(struct e1000_hw *hw);
54 s32 e1000_copper_link_autoneg(struct e1000_hw *hw);
61 s32 e1000_get_cable_length_m88(struct e1000_hw *hw);
65 s32 e1000_get_phy_id(struct e1000_hw *hw);
66 s32 e1000_get_phy_info_igp(struct e1000_hw *hw);
67 s32 e1000_get_phy_info_m88(struct e1000_hw *hw);
68 s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
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H A De1000_api.h55 s32 e1000_set_mac_type(struct e1000_hw *hw);
66 s32 e1000_reset_hw(struct e1000_hw *hw);
67 s32 e1000_init_hw(struct e1000_hw *hw);
68 s32 e1000_setup_link(struct e1000_hw *hw);
76 s32 e1000_setup_led(struct e1000_hw *hw);
77 s32 e1000_cleanup_led(struct e1000_hw *hw);
79 s32 e1000_blink_led(struct e1000_hw *hw);
80 s32 e1000_led_on(struct e1000_hw *hw);
81 s32 e1000_led_off(struct e1000_hw *hw);
82 s32 e1000_id_led_init(struct e1000_hw *hw);
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H A De1000_mac.h41 s32 e1000_null_ops_generic(struct e1000_hw *hw);
48 s32 e1000_blink_led_generic(struct e1000_hw *hw);
52 s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
57 s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);
58 s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
68 s32 e1000_id_led_init_generic(struct e1000_hw *hw);
69 s32 e1000_led_on_generic(struct e1000_hw *hw);
70 s32 e1000_led_off_generic(struct e1000_hw *hw);
74 s32 e1000_set_default_fc_generic(struct e1000_hw *hw);
77 s32 e1000_setup_led_generic(struct e1000_hw *hw);
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H A De1000_mbx.c75 s32 ret_val = -E1000_ERR_MBX; in e1000_read_mbx()
101 s32 ret_val = E1000_SUCCESS; in e1000_write_mbx()
124 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_msg()
144 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_ack()
164 s32 ret_val = -E1000_ERR_MBX; in e1000_check_for_rst()
249 s32 ret_val = -E1000_ERR_MBX; in e1000_read_posted_mbx()
278 s32 ret_val = -E1000_ERR_MBX; in e1000_write_posted_mbx()
460 s32 ret_val; in e1000_write_mbx_vf()
501 s32 ret_val = E1000_SUCCESS; in e1000_read_mbx_vf()
682 s32 ret_val; in e1000_write_mbx_pf()
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H A De1000_nvm.h63 s32 e1000_null_led_default(struct e1000_hw *hw, u16 *data);
65 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw);
67 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
68 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
72 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
75 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
77 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
80 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,
85 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);
86 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,
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H A De1000_api.c46 s32 ret_val = E1000_SUCCESS; in e1000_init_mac_params()
72 s32 ret_val = E1000_SUCCESS; in e1000_init_nvm_params()
98 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params()
124 s32 ret_val = E1000_SUCCESS; in e1000_init_mbx_params()
153 s32 ret_val = E1000_SUCCESS; in e1000_set_mac_type()
428 s32 ret_val; in e1000_setup_init_funcs()
673 s32 e1000_reset_hw(struct e1000_hw *hw) in e1000_reset_hw()
688 s32 e1000_init_hw(struct e1000_hw *hw) in e1000_init_hw()
738 s32 e1000_setup_led(struct e1000_hw *hw) in e1000_setup_led()
799 s32 e1000_led_on(struct e1000_hw *hw) in e1000_led_on()
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H A De1000_hw.h732 s32 (*led_on)(struct e1000_hw *);
733 s32 (*led_off)(struct e1000_hw *);
735 s32 (*reset_hw)(struct e1000_hw *);
736 s32 (*init_hw)(struct e1000_hw *);
768 s32 (*acquire)(struct e1000_hw *);
772 s32 (*commit)(struct e1000_hw *);
776 s32 (*get_info)(struct e1000_hw *);
782 s32 (*reset)(struct e1000_hw *);
797 s32 (*acquire)(struct e1000_hw *);
801 s32 (*update)(struct e1000_hw *);
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H A De1000_i210.c57 s32 ret_val; in e1000_acquire_nvm_i210()
93 s32 ret_val = E1000_SUCCESS; in e1000_acquire_swfw_sync_i210()
166 s32 i = 0; in e1000_get_hw_semaphore_i210()
238 s32 status = E1000_SUCCESS; in e1000_read_nvm_srrd_i210()
638 s32 ret_val; in e1000_update_nvm_checksum_i210()
717 s32 ret_val; in e1000_update_flash_i210()
773 s32 ret_val; in e1000_init_nvm_params_i210()
822 s32 ret_val; in e1000_valid_led_default_i210()
858 s32 ret_val; in __e1000_access_xmdio_reg()
927 s32 ret_val; in e1000_pll_workaround_i210()
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H A De1000_vf.c42 static s32 e1000_acquire_vf(struct e1000_hw *hw);
43 static s32 e1000_setup_link_vf(struct e1000_hw *hw);
49 static s32 e1000_init_hw_vf(struct e1000_hw *hw);
50 static s32 e1000_reset_hw_vf(struct e1000_hw *hw);
224 s32 status; in e1000_get_link_up_info_vf()
258 static s32 e1000_reset_hw_vf(struct e1000_hw *hw) in e1000_reset_hw_vf()
262 s32 ret_val = -E1000_ERR_MAC_INIT; in e1000_reset_hw_vf()
307 static s32 e1000_init_hw_vf(struct e1000_hw *hw) in e1000_init_hw_vf()
329 s32 ret_val; in e1000_rar_set_vf()
482 s32 ret_val; in e1000_promisc_set_vf()
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H A De1000_vf.h201 s32 (*init_params)(struct e1000_hw *);
202 s32 (*check_for_link)(struct e1000_hw *);
204 s32 (*get_bus_info)(struct e1000_hw *);
207 s32 (*reset_hw)(struct e1000_hw *);
208 s32 (*init_hw)(struct e1000_hw *);
209 s32 (*setup_link)(struct e1000_hw *);
212 s32 (*read_mac_addr)(struct e1000_hw *);
229 s32 (*init_params)(struct e1000_hw *hw);
234 s32 (*check_for_msg)(struct e1000_hw *, u16);
235 s32 (*check_for_ack)(struct e1000_hw *, u16);
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H A De1000_82575.c1173 s32 ret_val; in e1000_get_link_up_info_82575()
1196 s32 ret_val; in e1000_check_for_link_82575()
1236 s32 ret_val; in e1000_check_for_link_media_swap()
1429 s32 ret_val; in e1000_reset_hw_82575()
1493 s32 ret_val; in e1000_init_hw_82575()
1550 s32 ret_val; in e1000_setup_copper_link_82575()
1926 s32 ret_val; in e1000_valid_led_default_82575()
2009 s32 ret_val; in e1000_read_mac_addr_82575()
3489 s32 i; in e1000_clock_in_i2c_byte()
3513 s32 i; in e1000_clock_out_i2c_byte()
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H A De1000_80003es2lan.c92 s32 ret_val; in e1000_init_phy_params_80003es2lan()
364 s32 ret_val; in e1000_acquire_nvm_80003es2lan()
407 s32 i = 0; in e1000_acquire_swfw_sync_80003es2lan()
476 s32 ret_val; in e1000_read_phy_reg_gg82563_80003es2lan()
547 s32 ret_val; in e1000_write_phy_reg_gg82563_80003es2lan()
664 s32 ret_val; in e1000_phy_force_speed_duplex_80003es2lan()
760 s32 ret_val; in e1000_get_cable_length_80003es2lan()
796 s32 ret_val; in e1000_get_link_up_info_80003es2lan()
822 s32 ret_val; in e1000_reset_hw_80003es2lan()
888 s32 ret_val; in e1000_init_hw_80003es2lan()
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H A De1000_phy.c267 s32 ret_val; in e1000_phy_reset_dsp_generic()
656 s32 ret_val; in e1000_read_phy_reg_m88()
686 s32 ret_val; in e1000_write_phy_reg_m88()
1016 s32 ret_val; in e1000_set_master_slave_mode()
1056 s32 ret_val; in e1000_copper_link_setup_82577()
1121 s32 ret_val; in e1000_copper_link_setup_m88()
1273 s32 ret_val; in e1000_copper_link_setup_m88_gen2()
1369 s32 ret_val; in e1000_copper_link_setup_igp()
1479 s32 ret_val; in e1000_phy_setup_autoneg()
1632 s32 ret_val; in e1000_copper_link_autoneg()
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H A De1000_82571.c97 s32 ret_val; in e1000_init_phy_params_82571()
465 s32 ret_val; in e1000_get_phy_id_82571()
517 s32 i = 0; in e1000_get_hw_semaphore_82571()
596 s32 i = 0; in e1000_get_hw_semaphore_82573()
650 s32 ret_val; in e1000_get_hw_semaphore_82574()
739 s32 ret_val; in e1000_acquire_nvm_82571()
790 s32 ret_val; in e1000_write_nvm_82571()
823 s32 ret_val; in e1000_update_nvm_checksum_82571()
983 s32 ret_val; in e1000_set_d0_lplu_state_82571()
1062 s32 ret_val; in e1000_reset_hw_82571()
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H A De1000_82540.c53 static s32 e1000_init_hw_82540(struct e1000_hw *hw);
69 s32 ret_val; in e1000_init_phy_params_82540()
161 s32 ret_val = E1000_SUCCESS; in e1000_init_mac_params_82540()
273 s32 ret_val = E1000_SUCCESS; in e1000_reset_hw_82540()
332 s32 ret_val; in e1000_init_hw_82540()
414 s32 ret_val; in e1000_setup_copper_link_82540()
463 s32 ret_val = E1000_SUCCESS; in e1000_setup_fiber_serdes_link_82540()
501 s32 ret_val; in e1000_adjust_serdes_amplitude_82540()
531 s32 ret_val; in e1000_set_vco_speed_82540()
590 s32 ret_val = E1000_SUCCESS; in e1000_set_phy_mode_82540()
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H A De1000_82542.c45 static s32 e1000_reset_hw_82542(struct e1000_hw *hw);
46 static s32 e1000_init_hw_82542(struct e1000_hw *hw);
48 static s32 e1000_led_on_82542(struct e1000_hw *hw);
49 static s32 e1000_led_off_82542(struct e1000_hw *hw);
61 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params_82542()
195 s32 ret_val = E1000_SUCCESS; in e1000_reset_hw_82542()
243 static s32 e1000_init_hw_82542(struct e1000_hw *hw) in e1000_init_hw_82542()
247 s32 ret_val = E1000_SUCCESS; in e1000_init_hw_82542()
320 s32 ret_val; in e1000_setup_link_82542()
373 static s32 e1000_led_on_82542(struct e1000_hw *hw) in e1000_led_on_82542()
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