/dragonfly/sys/dev/drm/amd/display/dc/dcn10/ |
H A D | dcn10_dpp_dscl.c | 311 && (scl_data->taps.h_taps > 1 && scl_data->taps.h_taps_c > 1); in dpp1_dscl_set_scl_filter() 314 && (scl_data->taps.v_taps > 1 && scl_data->taps.v_taps_c > 1); in dpp1_dscl_set_scl_filter() 331 scl_data->taps.h_taps, scl_data->ratios.horz); in dpp1_dscl_set_scl_filter() 333 scl_data->taps.v_taps, scl_data->ratios.vert); in dpp1_dscl_set_scl_filter() 340 scl_data->taps.h_taps_c, scl_data->ratios.horz_c); in dpp1_dscl_set_scl_filter() 342 scl_data->taps.v_taps_c, scl_data->ratios.vert_c); in dpp1_dscl_set_scl_filter() 414 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dpp1_dscl_calc_lb_num_partitions() 415 scl_data->viewport.width : scl_data->recout.width; in dpp1_dscl_calc_lb_num_partitions() 417 scl_data->viewport_c.width : scl_data->recout.width; in dpp1_dscl_calc_lb_num_partitions() 671 if (memcmp(&dpp->scl_data, scl_data, sizeof(*scl_data)) == 0) in dpp1_dscl_set_scaler_manual_scale() [all …]
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H A D | dcn10_dpp.c | 139 struct scaler_data *scl_data, in dpp_get_optimal_number_of_taps() argument 144 if (scl_data->viewport.width > scl_data->recout.width) in dpp_get_optimal_number_of_taps() 156 if (scl_data->viewport.width > scl_data->h_active && in dpp_get_optimal_number_of_taps() 175 scl_data->taps.h_taps = 4; in dpp_get_optimal_number_of_taps() 179 scl_data->taps.v_taps = 4; in dpp_get_optimal_number_of_taps() 183 scl_data->taps.v_taps_c = 2; in dpp_get_optimal_number_of_taps() 187 scl_data->taps.h_taps_c = 2; in dpp_get_optimal_number_of_taps() 196 scl_data->taps.h_taps = 1; in dpp_get_optimal_number_of_taps() 198 scl_data->taps.v_taps = 1; in dpp_get_optimal_number_of_taps() 200 scl_data->taps.h_taps_c = 1; in dpp_get_optimal_number_of_taps() [all …]
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H A D | dcn10_hw_sequencer.c | 1758 switch (pipe_ctx->plane_res.scl_data.format) { in dcn10_get_surface_visual_confirm_color() 1800 switch (top_pipe_ctx->plane_res.scl_data.format) { in dcn10_get_hdr_visual_confirm_color() 1997 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler() 1998 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; in update_scaler() 2001 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data); in update_scaler() 2047 size.grph.surface_size = pipe_ctx->plane_res.scl_data.viewport; in update_dchubp_dpp() 2069 &pipe_ctx->plane_res.scl_data.viewport, in update_dchubp_dpp() 2070 &pipe_ctx->plane_res.scl_data.viewport_c); in update_dchubp_dpp() 2604 .viewport = pipe_ctx->plane_res.scl_data.viewport, in dcn10_set_cursor_position() 2605 .h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz, in dcn10_set_cursor_position() [all …]
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H A D | dcn10_dpp.h | 1359 struct scaler_data scl_data; member 1389 const struct scaler_data *scl_data, 1481 const struct scaler_data *scl_data);
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/dragonfly/sys/dev/drm/amd/display/dc/dce/ |
H A D | dce_transform.c | 893 struct scaler_data *scl_data, in dce_transform_get_optimal_number_of_taps() argument 901 (scl_data->viewport.width > scl_data->recout.width)) in dce_transform_get_optimal_number_of_taps() 906 scl_data->lb_params.depth, in dce_transform_get_optimal_number_of_taps() 922 scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false); in dce_transform_get_optimal_number_of_taps() 923 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); in dce_transform_get_optimal_number_of_taps() 924 scl_data->taps.h_taps_c = decide_taps(scl_data->ratios.horz_c, in_taps->h_taps, true); in dce_transform_get_optimal_number_of_taps() 925 scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true); in dce_transform_get_optimal_number_of_taps() 931 && scl_data->taps.v_taps > 1) { in dce_transform_get_optimal_number_of_taps() 935 if (scl_data->taps.v_taps <= 1) in dce_transform_get_optimal_number_of_taps() 941 if (max_num_of_lines <= scl_data->taps.v_taps_c && scl_data->taps.v_taps_c > 1) { in dce_transform_get_optimal_number_of_taps() [all …]
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H A D | dce_transform.h | 494 struct scaler_data *scl_data,
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/dragonfly/sys/dev/drm/amd/display/dc/core/ |
H A D | dc_resource.c | 585 if (pipe_ctx->plane_res.scl_data.recout.width + pipe_ctx->plane_res.scl_data.recout.x > in calculate_recout() 587 pipe_ctx->plane_res.scl_data.recout.width = in calculate_recout() 599 if (pipe_ctx->plane_res.scl_data.recout.height + pipe_ctx->plane_res.scl_data.recout.y > in calculate_recout() 607 pipe_ctx->plane_res.scl_data.recout.y += in calculate_recout() 625 pipe_ctx->plane_res.scl_data.recout.x += in calculate_recout() 684 pipe_ctx->plane_res.scl_data.ratios.horz_c = pipe_ctx->plane_res.scl_data.ratios.horz; in calculate_scaling_ratios() 685 pipe_ctx->plane_res.scl_data.ratios.vert_c = pipe_ctx->plane_res.scl_data.ratios.vert; in calculate_scaling_ratios() 1061 …if (pipe_ctx->plane_res.scl_data.viewport.height < 16 || pipe_ctx->plane_res.scl_data.viewport.wid… in resource_build_scaling_params() 1096 &pipe_ctx->plane_res.scl_data, in resource_build_scaling_params() 1102 &pipe_ctx->plane_res.scl_data, in resource_build_scaling_params() [all …]
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H A D | dc.c | 356 pipes->plane_res.scl_data.lb_params.depth, in dc_stream_set_dither_option()
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/dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
H A D | dcn_calcs.c | 380 input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps; in pipe_ctx_to_e2e_pipe_params() 388 switch (pipe->plane_res.scl_data.lb_params.depth) { in pipe_ctx_to_e2e_pipe_params() 874 + pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth() 876 + pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth() 880 - pipe->bottom_pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth() 883 - pipe->plane_res.scl_data.viewport.x; in dcn_validate_bandwidth() 886 + pipe->plane_res.scl_data.viewport.y; in dcn_validate_bandwidth() 888 + pipe->bottom_pipe->plane_res.scl_data.viewport.y; in dcn_validate_bandwidth() 892 - pipe->bottom_pipe->plane_res.scl_data.viewport.y; in dcn_validate_bandwidth() 895 - pipe->plane_res.scl_data.viewport.y; in dcn_validate_bandwidth() [all …]
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H A D | dce_calcs.c | 2796 data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width); in populate_initial_data() 2798 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height); in populate_initial_data() 2799 data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps); in populate_initial_data() 2800 data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); in populate_initial_data() 2854 …data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data() 2857 pipe[i].bottom_pipe->plane_res.scl_data.ratios.horz.value); in populate_initial_data() 2859 pipe[i].bottom_pipe->plane_res.scl_data.ratios.vert.value); in populate_initial_data() 2894 data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width); in populate_initial_data() 2896 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height); in populate_initial_data() 2897 data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps); in populate_initial_data() [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/dce110/ |
H A D | dce110_transform_v.c | 48 const struct scaler_data *scl_data, in calculate_viewport() argument 53 luma_viewport->x = scl_data->viewport.x - scl_data->viewport.x % 2; in calculate_viewport() 54 luma_viewport->y = scl_data->viewport.y - scl_data->viewport.y % 2; in calculate_viewport() 56 scl_data->viewport.width - scl_data->viewport.width % 2; in calculate_viewport() 58 scl_data->viewport.height - scl_data->viewport.height % 2; in calculate_viewport() 64 if (scl_data->format == PIXEL_FORMAT_420BPP8) { in calculate_viewport()
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H A D | dce110_hw_sequencer.c | 1226 switch (pipe_ctx->plane_res.scl_data.format) { in get_surface_visual_confirm_color() 1276 pipe_ctx->plane_res.scl_data.lb_params.depth, in program_scaler() 1294 &pipe_ctx->plane_res.scl_data); in program_scaler() 2717 pipe_ctx->plane_res.scl_data.viewport.width, in dce110_program_front_end_for_pipe() 2718 pipe_ctx->plane_res.scl_data.viewport.height, in dce110_program_front_end_for_pipe() 2719 pipe_ctx->plane_res.scl_data.viewport.x, in dce110_program_front_end_for_pipe() 2720 pipe_ctx->plane_res.scl_data.viewport.y, in dce110_program_front_end_for_pipe() 2721 pipe_ctx->plane_res.scl_data.recout.width, in dce110_program_front_end_for_pipe() 2722 pipe_ctx->plane_res.scl_data.recout.height, in dce110_program_front_end_for_pipe() 2723 pipe_ctx->plane_res.scl_data.recout.x, in dce110_program_front_end_for_pipe() [all …]
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/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/ |
H A D | transform.h | 188 const struct scaler_data *scl_data); 197 struct scaler_data *scl_data, 299 const struct scaler_data *scl_data,
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H A D | dpp.h | 67 const struct scaler_data *scl_data); 76 struct scaler_data *scl_data,
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/dragonfly/sys/dev/drm/amd/display/dc/inc/ |
H A D | core_types.h | 198 struct scaler_data scl_data; member
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