/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_debugfs.c | 623 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local 634 simd = (*pos & GENMASK_ULL(44, 37)) >> 37; in amdgpu_debugfs_wave_read() 642 adev->gfx.funcs->read_wave_data(adev, simd, wave, data, &x); in amdgpu_debugfs_wave_read() 695 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local 706 simd = (*pos & GENMASK_ULL(51, 44)) >> 44; in amdgpu_debugfs_gpr_read() 720 adev->gfx.funcs->read_wave_vgprs(adev, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read() 723 adev->gfx.funcs->read_wave_sgprs(adev, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
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H A D | gfx_v9_0.c | 1094 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 1100 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 1106 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 1119 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_0_read_wave_data() 1120 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_0_read_wave_data() 1121 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_0_read_wave_data() 1124 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_0_read_wave_data() 1130 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v9_0_read_wave_data() 1132 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v9_0_read_wave_data() 1140 adev, simd, wave, 0, in gfx_v9_0_read_wave_sgprs() [all …]
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H A D | gfx_v8_0.c | 5493 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind() 5499 static void wave_read_regs(struct amdgpu_device *adev, uint32_t simd, in wave_read_regs() argument 5505 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs() 5518 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v8_0_read_wave_data() 5519 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v8_0_read_wave_data() 5520 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v8_0_read_wave_data() 5523 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v8_0_read_wave_data() 5529 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v8_0_read_wave_data() 5530 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_TBA_LO); in gfx_v8_0_read_wave_data() 5535 dst[(*no_fields)++] = wave_read_ind(adev, simd, wave, ixSQ_WAVE_M0); in gfx_v8_0_read_wave_data() [all …]
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H A D | amdgpu.h | 868 …void (*read_wave_data)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t *dst, in… 869 …void (*read_wave_vgprs)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t thread,… 870 …void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t start, …
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/dragonfly/contrib/gcc-8.0/gcc/ |
H A D | omp-grid.c | 1038 gomp_for *simd = as_a <gomp_for *> (stmt); in grid_eliminate_combined_simd_part() local 1043 gcc_checking_assert (collapse == gimple_omp_for_collapse (simd)); in grid_eliminate_combined_simd_part() 1046 gimple_omp_for_set_index (parloop, i, gimple_omp_for_index (simd, i)); in grid_eliminate_combined_simd_part() 1047 gimple_omp_for_set_initial (parloop, i, gimple_omp_for_initial (simd, i)); in grid_eliminate_combined_simd_part() 1048 gimple_omp_for_set_final (parloop, i, gimple_omp_for_final (simd, i)); in grid_eliminate_combined_simd_part() 1049 gimple_omp_for_set_incr (parloop, i, gimple_omp_for_incr (simd, i)); in grid_eliminate_combined_simd_part() 1059 tree *pc = gimple_omp_for_clauses_ptr (simd); in grid_eliminate_combined_simd_part() 1093 gimple_omp_set_body (parloop, gimple_omp_body (simd)); in grid_eliminate_combined_simd_part()
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H A D | omp-general.c | 128 bool simd = gimple_omp_for_kind (for_stmt) & GF_OMP_FOR_SIMD; in omp_extract_for_data() local 137 fd->have_nowait = distribute || simd; in omp_extract_for_data() 260 if (simd in omp_extract_for_data() 373 && !simd in omp_extract_for_data()
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H A D | gimplify.c | 7427 omp_is_private (struct gimplify_omp_ctx *ctx, tree decl, int simd) in omp_is_private() argument 7438 if (simd) in omp_is_private() 7461 else if (simd == 0 && (n->value & GOVD_LINEAR) != 0) in omp_is_private() 7464 else if (simd == 1 && (n->value & GOVD_LASTPRIVATE) != 0) in omp_is_private() 7467 else if (simd && (n->value & GOVD_PRIVATE) != 0) in omp_is_private() 7470 else if (simd == 2 && (n->value & GOVD_LINEAR) != 0) in omp_is_private() 7484 return omp_is_private (ctx->outer_context, decl, simd); in omp_is_private()
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H A D | omp-low.c | 6498 bool simd = omp_find_clause (gimple_omp_ordered_clauses (ord_stmt), in lower_omp_ordered() local 6503 = simd && omp_maybe_offloaded_ctx (ctx) && omp_max_simt_vf () > 1; in lower_omp_ordered() 6526 if (simd) in lower_omp_ordered() 6587 if (simd) in lower_omp_ordered()
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H A D | tree-inline.c | 3829 machine_mode simd = targetm.vectorize.preferred_simd_mode (inner); in estimate_move_cost() local 3832 int simd_mode_size = estimated_poly_value (GET_MODE_SIZE (simd)); in estimate_move_cost()
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H A D | params.def | 563 "unless the loop is marked with simd pragma.",
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H A D | tree.def | 1149 /* OpenMP - #pragma omp simd [clause1 ... clauseN]
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H A D | common.opt | 2776 …imited|dynamic|cheap] Specifies the vectorization cost model for code marked with a simd directive.
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H A D | target.def | 1640 /* Functions relating to OpenMP SIMD and __attribute__((simd)) clones. */
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/dragonfly/contrib/binutils-2.27/gas/doc/ |
H A D | c-aarch64.texi | 136 @tab Enable cryptographic extensions. This implies @code{fp} and @code{simd}. 154 @tab Enable ARMv8.1 Advanced SIMD extensions. This implies @code{simd}. 155 @item @code{simd} @tab ARMv8-A @tab ARMv8-A or later
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H A D | c-arm.texi | 174 @code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}), 185 @code{simd} (Advanced SIMD Extensions for v8-A architecture, implies @code{fp}), 192 @code{simd})
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/dragonfly/contrib/gcc-8.0/gcc/config/i386/ |
H A D | haswell.md | 26 (define_attr "hsw_domain" "int,float,simd" 36 (const_string "simd")) 38 (const_string "simd")]
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H A D | core2.md | 35 (define_attr "i7_domain" "int,float,simd" 45 (const_string "simd")) 47 (const_string "simd")]
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/dragonfly/contrib/gcc-4.7/gcc/config/i386/ |
H A D | core2.md | 35 (define_attr "i7_domain" "int,float,simd" 45 (const_string "simd")) 47 (const_string "simd")]
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/dragonfly/contrib/gcc-8.0/gcc/fortran/ |
H A D | lang.opt | 288 Wopenmp-simd 649 fopenmp-simd
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/dragonfly/contrib/gcc-8.0/gcc/c-family/ |
H A D | c.opt | 891 Wopenmp-simd 893 Warn if a simd directive is overridden by the vectorizer cost model. 1624 fopenmp-simd
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/dragonfly/contrib/gcc-4.7/gcc/ |
H A D | tree-inline.c | 3309 enum machine_mode simd in estimate_move_cost() local 3311 int simd_mode_size = GET_MODE_SIZE (simd); in estimate_move_cost()
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/dragonfly/contrib/gcc-8.0/gcc/c/ |
H A D | c-parser.c | 16667 bool simd = false; in c_parser_omp_distribute() local 16671 simd = true; in c_parser_omp_distribute() 16674 if (parallel || simd) in c_parser_omp_distribute() 16682 if (simd) in c_parser_omp_distribute() 16690 if (simd) in c_parser_omp_distribute()
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/dragonfly/contrib/gcc-8.0/gcc/cp/ |
H A D | parser.c | 36119 bool simd = false; in cp_parser_omp_distribute() local 36123 simd = true; in cp_parser_omp_distribute() 36126 if (parallel || simd) in cp_parser_omp_distribute() 36134 if (simd) in cp_parser_omp_distribute() 36143 if (simd) in cp_parser_omp_distribute()
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/dragonfly/contrib/gcc-4.7/gcc/doc/ |
H A D | invoke.texi | 16729 This switch enables or disables the generation of SPE simd 16736 This switch enables or disables the generation of PAIRED simd
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H A D | extend.texi | 3865 Generate code that uses (does not use) the generation of PAIRED simd
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