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Searched refs:src_width (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/i915/
H A Dintel_overlay.c1007 rec->src_width > IMAGE_MAX_WIDTH_LEGACY) in check_overlay_src()
1011 rec->src_width > IMAGE_MAX_WIDTH) in check_overlay_src()
1017 rec->src_width < N_HORIZ_Y_TAPS*4) in check_overlay_src()
1053 if (rec->src_width % uv_hscale) in check_overlay_src()
1077 if (packed_width_bytes(rec->flags, rec->src_width) > rec->stride_Y) in check_overlay_src()
1086 if (rec->src_width > rec->stride_Y) in check_overlay_src()
1088 if (rec->src_width/uv_hscale > rec->stride_UV) in check_overlay_src()
1203 params->src_w = put_image_rec->src_width; in intel_overlay_put_image_ioctl()
/dragonfly/sys/dev/drm/amd/display/dc/
H A Ddm_services_types.h120 uint32_t src_width; member
/dragonfly/sys/dev/drm/amd/display/dc/calcs/
H A Ddce_calcs.c385 data->src_width[maximum_number_of_surfaces - 2] = data->src_width[5]; in calculate_bandwidth()
386 data->src_width[maximum_number_of_surfaces - 1] = data->src_width[5]; in calculate_bandwidth()
389 data->pitch_in_pixels[maximum_number_of_surfaces - 2] = data->src_width[5]; in calculate_bandwidth()
390 data->pitch_in_pixels[maximum_number_of_surfaces - 1] = data->src_width[5]; in calculate_bandwidth()
423 data->src_width_after_surface_type = bw_div(data->src_width[i], bw_int_to_fixed(2)); in calculate_bandwidth()
430 data->src_width_after_surface_type = data->src_width[i]; in calculate_bandwidth()
2797 data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; in populate_initial_data()
2895 data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; in populate_initial_data()
2945 data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].stream->src.width); in populate_initial_data()
2946 data->pitch_in_pixels[num_displays + 4] = data->src_width[num_displays + 4]; in populate_initial_data()
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H A Dcalcs_logger.h423 DC_LOG_BANDWIDTH_CALCS(" [bw_fixed] src_width[%d]:%d", i, bw_fixed_to_int(data->src_width[i])); in print_bw_calcs_data()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddce_v10_0.c686 u32 src_width; /* viewport width */ member
851 fixed20_12 src_width; in dce_v10_0_average_bandwidth() local
859 src_width.full = dfixed_const(wm->src_width); in dce_v10_0_average_bandwidth()
860 bandwidth.full = dfixed_mul(src_width, bpp); in dce_v10_0_average_bandwidth()
912 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); in dce_v10_0_latency_watermark()
977 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v10_0_check_latency_hiding()
1042 wm_high.src_width = mode->crtc_hdisplay; in dce_v10_0_program_watermarks()
1081 wm_low.src_width = mode->crtc_hdisplay; in dce_v10_0_program_watermarks()
H A Ddce_v11_0.c712 u32 src_width; /* viewport width */ member
877 fixed20_12 src_width; in dce_v11_0_average_bandwidth() local
885 src_width.full = dfixed_const(wm->src_width); in dce_v11_0_average_bandwidth()
886 bandwidth.full = dfixed_mul(src_width, bpp); in dce_v11_0_average_bandwidth()
938 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); in dce_v11_0_latency_watermark()
1003 u32 lb_partitions = wm->lb_size / wm->src_width; in dce_v11_0_check_latency_hiding()
1068 wm_high.src_width = mode->crtc_hdisplay; in dce_v11_0_program_watermarks()
1107 wm_low.src_width = mode->crtc_hdisplay; in dce_v11_0_program_watermarks()
/dragonfly/sys/dev/drm/radeon/
H A Devergreen.c1918 u32 src_width; /* viewport width */ member
2027 fixed20_12 src_width; in evergreen_average_bandwidth() local
2035 src_width.full = dfixed_const(wm->src_width); in evergreen_average_bandwidth()
2036 bandwidth.full = dfixed_mul(src_width, bpp); in evergreen_average_bandwidth()
2076 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); in evergreen_latency_watermark()
2110 u32 lb_partitions = wm->lb_size / wm->src_width; in evergreen_check_latency_hiding()
2173 wm_high.src_width = mode->crtc_hdisplay; in evergreen_program_watermarks()
2200 wm_low.src_width = mode->crtc_hdisplay; in evergreen_program_watermarks()
H A Dsi.c2048 u32 src_width; /* viewport width */ member
2174 fixed20_12 src_width; in dce6_average_bandwidth() local
2182 src_width.full = dfixed_const(wm->src_width); in dce6_average_bandwidth()
2183 bandwidth.full = dfixed_mul(src_width, bpp); in dce6_average_bandwidth()
2226 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); in dce6_latency_watermark()
2260 u32 lb_partitions = wm->lb_size / wm->src_width; in dce6_check_latency_hiding()
2326 wm_high.src_width = mode->crtc_hdisplay; in dce6_program_watermarks()
2353 wm_low.src_width = mode->crtc_hdisplay; in dce6_program_watermarks()
H A Dcik.c8889 u32 src_width; /* viewport width */ member
9054 fixed20_12 src_width; in dce8_average_bandwidth() local
9062 src_width.full = dfixed_const(wm->src_width); in dce8_average_bandwidth()
9063 bandwidth.full = dfixed_mul(src_width, bpp); in dce8_average_bandwidth()
9115 a.full = dfixed_const(max_src_lines_per_dst_line * wm->src_width * wm->bytes_per_pixel); in dce8_latency_watermark()
9180 u32 lb_partitions = wm->lb_size / wm->src_width; in dce8_check_latency_hiding()
9246 wm_high.src_width = mode->crtc_hdisplay; in dce8_program_watermarks()
9286 wm_low.src_width = mode->crtc_hdisplay; in dce8_program_watermarks()
/dragonfly/sys/dev/drm/amd/display/dc/inc/
H A Ddce_calcs.h391 struct bw_fixed src_width[maximum_number_of_surfaces]; member
/dragonfly/sys/dev/drm/include/uapi/drm/
H A Di915_drm.h1232 __u16 src_width; member
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c2454 cfg->src_width = stream->src.width; in dce110_fill_display_configs()