Searched refs:to_intel_atomic_state (Results 1 – 8 of 8) sorted by relevance
1824 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_compute_min_cdclk()1852 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in vlv_modeset_calc_cdclk()1877 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in bdw_modeset_calc_cdclk()1907 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in skl_modeset_calc_cdclk()1943 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in bxt_modeset_calc_cdclk()1983 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in cnl_modeset_calc_cdclk()
236 struct intel_atomic_state *state = to_intel_atomic_state(old_state->state); in intel_plane_atomic_update()
363 struct intel_atomic_state *state = to_intel_atomic_state(s); in intel_atomic_state_clear()
1318 to_intel_atomic_state(crtc_state->base.state); in g4x_compute_pipe_wm()1825 to_intel_atomic_state(crtc_state->base.state); in vlv_compute_pipe_wm()2752 to_intel_atomic_state(cstate->base.state); in hsw_compute_linetime_wm()3121 to_intel_atomic_state(newstate->base.state); in ilk_compute_intermediate_wm()3669 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in intel_can_enable_sagv()3738 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in skl_ddb_get_pipe_allocation_limits()3966 dotclk = to_intel_atomic_state(state)->cdclk.logical.cdclk; in skl_check_pipe_max_pixel_rate()4380 to_intel_atomic_state(cstate->base.state); in skl_compute_plane_wm_params()4475 to_intel_atomic_state(cstate->base.state); in skl_compute_plane_wm()4872 struct intel_atomic_state *intel_state = to_intel_atomic_state(state); in skl_ddb_add_affected_planes()[all …]
3557 to_intel_atomic_state(state)->skip_intermediate_wm = true; in __intel_display_resume()5039 to_intel_atomic_state(old_state); in intel_pre_plane_update()5255 to_intel_atomic_state(old_state); in ironlake_crtc_enable()5364 to_intel_atomic_state(old_state); in haswell_crtc_enable()5683 to_intel_atomic_state(old_state); in valleyview_crtc_enable()5751 to_intel_atomic_state(old_state); in i9xx_crtc_enable()10442 !to_intel_atomic_state(state)->skip_intermediate_wm) { in intel_crtc_atomic_check()12648 to_intel_atomic_state(new_state->state); in intel_prepare_plane_fb()12861 to_intel_atomic_state(old_crtc_state->state); in intel_begin_crtc_commit()12895 to_intel_atomic_state(old_crtc_state->state); in intel_finish_crtc_commit()[all …]
62 struct intel_atomic_state *state = to_intel_atomic_state(s); in intel_atomic_get_shared_dpll_state()325 if (!to_intel_atomic_state(state)->dpll_set) in intel_shared_dpll_swap_state()328 shared_dpll = to_intel_atomic_state(state)->shared_dpll; in intel_shared_dpll_swap_state()
890 #define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state, base) macro
1832 to_intel_atomic_state(pipe_config->base.state)->cdclk.logical.vco = vco; in intel_dp_compute_config()