Searched refs:uvd_clock_voltage_dependency_table (Results 1 – 11 of 11) sorted by relevance
611 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = in amdgpu_parse_extended_power_table()613 if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) { in amdgpu_parse_extended_power_table()617 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = in amdgpu_parse_extended_power_table()624 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = in amdgpu_parse_extended_power_table()626 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = in amdgpu_parse_extended_power_table()628 adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = in amdgpu_parse_extended_power_table()788 kfree(dyn_state->uvd_clock_voltage_dependency_table.entries); in amdgpu_free_extended_power_table()
199 struct amdgpu_uvd_clock_voltage_dependency_table uvd_clock_voltage_dependency_table; member
1148 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries = in r600_parse_extended_power_table()1150 if (!rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) { in r600_parse_extended_power_table()1154 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count = in r600_parse_extended_power_table()1161 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk = in r600_parse_extended_power_table()1163 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk = in r600_parse_extended_power_table()1165 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v = in r600_parse_extended_power_table()1312 kfree(dyn_state->uvd_clock_voltage_dependency_table.entries); in r600_free_extended_power_table()
2690 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count; in ci_populate_smc_uvd_level()2694 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].vclk; in ci_populate_smc_uvd_level()2696 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].dclk; in ci_populate_smc_uvd_level()2698 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[count].v * VOLTAGE_SCALE; in ci_populate_smc_uvd_level()3976 for (i = rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1; i >= 0; i--) { in ci_enable_uvd_dpm()3977 if (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v <= max_limits->vddc) { in ci_enable_uvd_dpm()4115 (rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count <= 0)) in ci_update_uvd_dpm()4119 rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count - 1; in ci_update_uvd_dpm()5106 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table); in ci_patch_dependency_tables_with_leakage()
818 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()1424 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_update_uvd_dpm()1984 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_patch_voltage_values()
1489 struct radeon_uvd_clock_voltage_dependency_table uvd_clock_voltage_dependency_table; member
134 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_get_uvd_level()450 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_upload_pptable_to_smu()584 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_init_uvd_limit()1677 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_read_sensor()1841 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in smu8_dpm_update_uvd_dpm()
1244 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; in init_clock_voltage_dependency()1277 &hwmgr->dyn_state.uvd_clock_voltage_dependency_table, ptable, array); in init_clock_voltage_dependency()1701 kfree(hwmgr->dyn_state.uvd_clock_voltage_dependency_table); in pp_tables_uninitialize()1702 hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; in pp_tables_uninitialize()
2426 tmp = smu7_patch_uvd_vddc(hwmgr, hwmgr->dyn_state.uvd_clock_voltage_dependency_table); in smu7_patch_dependency_tables_with_leakage()
613 *uvd_clock_voltage_dependency_table; member
1522 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in ci_populate_smc_uvd_level()2858 hwmgr->dyn_state.uvd_clock_voltage_dependency_table; in ci_update_uvd_smc_table()