/dragonfly/sys/dev/drm/amd/display/dc/inc/ |
H A D | reg_helper.h | 86 f5, v5) \ argument 92 FN(reg, f5), v5) 95 f5, v5, f6, v6) \ argument 101 FN(reg, f5), v5,\ 111 FN(reg, f5), v5,\ 122 FN(reg, f5), v5,\ 134 FN(reg, f5), v5, \ 147 FN(reg, f5), v5, \ 259 FN(reg, f5), v5) 267 FN(reg, f5), v5, \ [all …]
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H A D | dcn_calc_math.h | 36 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5);
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | atombios_encoders.c | 637 DIG_ENCODER_CONTROL_PARAMETERS_V5 v5; member 775 args.v5.asStreamParam.ucDigMode = in amdgpu_atombios_encoder_setup_dig_encoder() 781 args.v5.asStreamParam.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_encoder() 783 args.v5.asStreamParam.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_encoder() 784 args.v5.asStreamParam.ulPixelClock = in amdgpu_atombios_encoder_setup_dig_encoder() 1127 args.v5.ucAction = action; in amdgpu_atombios_encoder_setup_dig_transmitter() 1157 args.v5.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_transmitter() 1159 args.v5.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_transmitter() 1161 args.v5.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_transmitter() 1177 args.v5.asConfig.ucHPDSel = 0; in amdgpu_atombios_encoder_setup_dig_transmitter() [all …]
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H A D | atombios_crtc.c | 463 PIXEL_CLOCK_PARAMETERS_V5 v5; member 492 args.v5.ucCRTC = ATOM_CRTC_INVALID; in amdgpu_atombios_crtc_set_disp_eng_pll() 493 args.v5.usPixelClock = cpu_to_le16(dispclk); in amdgpu_atombios_crtc_set_disp_eng_pll() 494 args.v5.ucPpll = ATOM_DCPLL; in amdgpu_atombios_crtc_set_disp_eng_pll() 644 args.v5.ucCRTC = crtc_id; in amdgpu_atombios_crtc_program_pll() 646 args.v5.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll() 647 args.v5.usFbDiv = cpu_to_le16(fb_div); in amdgpu_atombios_crtc_program_pll() 649 args.v5.ucPostDiv = post_div; in amdgpu_atombios_crtc_program_pll() 670 args.v5.ucTransmitterID = encoder_id; in amdgpu_atombios_crtc_program_pll() 671 args.v5.ucEncoderMode = encoder_mode; in amdgpu_atombios_crtc_program_pll() [all …]
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H A D | amdgpu_atombios.c | 990 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5; member 1036 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in amdgpu_atombios_get_clock_dividers() 1038 args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN; in amdgpu_atombios_get_clock_dividers() 1042 dividers->post_div = args.v5.ucPostDiv; in amdgpu_atombios_get_clock_dividers() 1043 dividers->enable_post_div = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers() 1045 dividers->enable_dithen = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers() 1047 dividers->whole_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDiv); in amdgpu_atombios_get_clock_dividers() 1048 dividers->frac_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDivFrac); in amdgpu_atombios_get_clock_dividers() 1049 dividers->ref_div = args.v5.ucRefDiv; in amdgpu_atombios_get_clock_dividers() 1050 dividers->vco_mode = (args.v5.ucCntlFlag & in amdgpu_atombios_get_clock_dividers()
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/dragonfly/contrib/mpfr/src/ |
H A D | gammaonethird.c | 54 unsigned long int v5, mpfr_rnd_t mode) in mpfr_mul_ui5() argument 61 MPFR_ACC_OR_MUL (v5); in mpfr_mul_ui5() 79 unsigned long int v5, unsigned long int v6, in mpfr_div_ui8() argument 87 MPFR_ACC_OR_DIV (v5); in mpfr_div_ui8()
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/dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
H A D | dcn_calc_math.c | 90 float dcn_bw_max5(float v1, float v2, float v3, float v4, float v5) in dcn_bw_max5() argument 92 …return dcn_bw_max3(v1, v2, v3) > dcn_bw_max2(v4, v5) ? dcn_bw_max3(v1, v2, v3) : dcn_bw_max2(v4, v… in dcn_bw_max5()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | atombios_encoders.c | 1366 args.v5.ucAction = action; in atombios_dig_transmitter_setup2() 1375 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYB; in atombios_dig_transmitter_setup2() 1377 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYA; in atombios_dig_transmitter_setup2() 1381 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYD; in atombios_dig_transmitter_setup2() 1392 args.v5.ucPhyId = ATOM_PHY_ID_UNIPHYG; in atombios_dig_transmitter_setup2() 1396 args.v5.ucLaneNum = dp_lane_count; in atombios_dig_transmitter_setup2() 1398 args.v5.ucLaneNum = 8; in atombios_dig_transmitter_setup2() 1400 args.v5.ucLaneNum = 4; in atombios_dig_transmitter_setup2() 1413 args.v5.asConfig.ucCoherentMode = 1; in atombios_dig_transmitter_setup2() 1416 args.v5.asConfig.ucHPDSel = 0; in atombios_dig_transmitter_setup2() [all …]
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H A D | atombios_crtc.c | 764 PIXEL_CLOCK_PARAMETERS_V5 v5; member 792 args.v5.ucCRTC = ATOM_CRTC_INVALID; in atombios_crtc_set_disp_eng_pll() 793 args.v5.usPixelClock = cpu_to_le16(dispclk); in atombios_crtc_set_disp_eng_pll() 794 args.v5.ucPpll = ATOM_DCPLL; in atombios_crtc_set_disp_eng_pll() 888 args.v5.ucCRTC = crtc_id; in atombios_crtc_program_pll() 890 args.v5.ucRefDiv = ref_div; in atombios_crtc_program_pll() 891 args.v5.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll() 893 args.v5.ucPostDiv = post_div; in atombios_crtc_program_pll() 913 args.v5.ucTransmitterID = encoder_id; in atombios_crtc_program_pll() 914 args.v5.ucEncoderMode = encoder_mode; in atombios_crtc_program_pll() [all …]
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H A D | radeon_atombios.c | 2811 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V5 v5; member 2883 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers() 2885 args.v5.ucInputFlag = ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN; in radeon_atom_get_clock_dividers() 2889 dividers->post_div = args.v5.ucPostDiv; in radeon_atom_get_clock_dividers() 2890 dividers->enable_post_div = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers() 2892 dividers->enable_dithen = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers() 2894 dividers->whole_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDiv); in radeon_atom_get_clock_dividers() 2895 dividers->frac_fb_div = le16_to_cpu(args.v5.ulFbDiv.usFbDivFrac); in radeon_atom_get_clock_dividers() 2896 dividers->ref_div = args.v5.ucRefDiv; in radeon_atom_get_clock_dividers() 2897 dividers->vco_mode = (args.v5.ucCntlFlag & in radeon_atom_get_clock_dividers()
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/dragonfly/contrib/file/magic/Magdir/ |
H A D | vms | 16 >44032 string PK\003\004 \b, Info-ZIP SFX archive v5.12 w/decryption 30 >>75264 string PK\003\004 \b, Info-ZIP SFX archive v5.12 w/decryption
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H A D | zip | 75 # >0 leshort 0x32 v5.0 76 # >0 leshort 0x33 v5.1 77 # >0 leshort 0x34 v5.2
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H A D | pgp-binary-keys | 148 # identify them. The next version of OpenPGP will introduce v5 keys. 150 # possible. But, for our purposes, it appears that v5 data structures 227 # Anticipate a v6 / v7 format that like v5 is compatible with v4.
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H A D | javascript | 28 # V8 bytecode extraction was added in NodeJS v5.7.0 (V8 4.6.85.31).
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/dragonfly/contrib/tcsh-6/ |
H A D | config.rpath | 86 sco3.2v5*) 400 sco3.2v5*) 526 sco3.2v5*)
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/dragonfly/sys/dev/raid/hptrr/ |
H A D | ldm.h | 43 #define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ #… argument 44 #define _hpt_set_ver(x, v1, v2, v3, v4, v5) __hpt_set_ver(x, v1, v2, v3, v4, v5) argument
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/dragonfly/sys/dev/raid/hpt27xx/ |
H A D | ldm.h | 41 #define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ #… argument 42 #define _hpt_set_ver(x, v1, v2, v3, v4, v5) __hpt_set_ver(x, v1, v2, v3, v4, v5) argument
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/dragonfly/contrib/openbsd_libm/src/ |
H A D | e_lgamma_r.c | 129 v5 = 3.21709242282423911810e-03, /* 0x3F6A5ABB, 0x57D0CF61 */ variable 264 p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*v5)))); in lgamma_r()
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H A D | e_lgammaf_r.c | 65 v5 = 3.2170924824e-03, /* 0x3b52d5db */ variable 200 p2 = one+y*(v1+y*(v2+y*(v3+y*(v4+y*v5)))); in lgammaf_r()
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/dragonfly/contrib/openbsd_libm/src/ld80/ |
H A D | e_lgammal.c | 161 v5 = 4.508989649747184050907206782117647852364E1L, variable 378 p2 = v0 + y * (v1 + y * (v2 + y * (v3 + y * (v4 + y * (v5 + y))))); in lgammal()
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/dragonfly/contrib/elftoolchain/ |
H A D | RELEASE-NOTES | 101 NetBSD_ v5.0.2 i386 102 OpenBSD_ v5.0 i386
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/dragonfly/contrib/zstd/lib/dictBuilder/ |
H A D | divsufsort.c | 339 int *v1, int *v2, int *v3, int *v4, int *v5) { in ss_median5() argument 342 if(Td[PA[*v4]] > Td[PA[*v5]]) { SWAP(v4, v5); } in ss_median5() 343 if(Td[PA[*v2]] > Td[PA[*v4]]) { SWAP(v2, v4); SWAP(v3, v5); } in ss_median5() 345 if(Td[PA[*v1]] > Td[PA[*v4]]) { SWAP(v1, v4); SWAP(v3, v5); } in ss_median5() 1001 int *v1, int *v2, int *v3, int *v4, int *v5) { in tr_median5() argument 1004 if(ISAd[*v4] > ISAd[*v5]) { SWAP(v4, v5); } in tr_median5() 1005 if(ISAd[*v2] > ISAd[*v4]) { SWAP(v2, v4); SWAP(v3, v5); } in tr_median5() 1007 if(ISAd[*v1] > ISAd[*v4]) { SWAP(v1, v4); SWAP(v3, v5); } in tr_median5()
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/dragonfly/usr.sbin/installer/libinstaller/ |
H A D | README | 1 libinstaller v5.0 README
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/dragonfly/etc/ |
H A D | services | 17 # v5 should uncomment v5 entries and comment v4 entries. 178 kerberos-sec 88/tcp kerberos # krb5 # Kerberos (v5) 179 kerberos-sec 88/udp kerberos # krb5 # Kerberos (v5) 795 kpasswd5 464/tcp # Kerberos (v5) 796 kpasswd5 464/udp # Kerberos (v5) 799 #kpasswd 464/tcp # Kerberos (v5) 800 #kpasswd 464/udp # Kerberos (v5) 985 klogin 543/tcp # Kerberos (v4/v5) 986 klogin 543/udp # Kerberos (v4/v5) 987 kshell 544/tcp krcmd # Kerberos (v4/v5) [all …]
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/dragonfly/contrib/gdb-7/gdb/ |
H A D | configure.host | 22 i[34567]86-*-sco3.2v5* | \
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